Corpus ID: 51946642

Layout Design and Simulation of CMOS Multiplexer

  title={Layout Design and Simulation of CMOS Multiplexer},
  author={Priti Gupta and Rajesh Mehra},
Multiplexer circuit is important device that have application in many field of Engineering. The research area of VLSI is to reduce area and complexity of the design. The purpose of this paper is to design 2 to 1 multiplexer with the help of CMOS logic to reduce area and complexity of the circuit. The different design methodologies are adopted in this paper to reduce the size, area and complexity of the multiplexer. This work evaluates 45nm technology. At the end, design methodologies are… 
Design and performance analysis of 2:1 multiplexer using multiple logic families at 180 nm technology
This work suggests that any higher level MUX with low power-delay and PDP can be achieved using Domino logic, and identifies the best logic family suitable for the design of higher levels of MUX.
Comparative Analysis of MUX Using Various CMOS Circuit Style under Nanometer Technology
This paper explains the designs of various CMOS circuit families including Static CMOS circuit, Pseudo NMOS circuit, Domino logic circuit and Dual-Rail Domino logic circuit by using VLSI software: LT
Performance Evaluation of LUTs in FPGA in Different Circuit Topologies
This project designs the LUT architecture using different circuit topologies to obtain the smallest Power delay product (PDP) value.
Investigation of The NBTI and PBTI Effects on Multiplexer Circuit Performances
This paper investigates the effects of Negative Bias Temperature Instability (NBTI) & Positive Bias Temperature Instability (PBTI) on 2-to-1 multiplexer circuit performances. The key objective of


Design Analysis of XOR Gates Using CMOS & Pass Transistor Logic
This paper compares two different logic styles based on 45 nm technology for implementing logic gates of upto two inputs in terms of their layout area, delay and power dissipation. The XOR gate has
Design of Low Voltage Low Power CMOS Analog Multiplexer For Bio-Medical Applications
Modified pass transistor logic is proposed, which replaces the traditional pass transistor Logic for designing a multiplexer and require less no.
Basic VLSI Design
A review of microelectronics and an introduction to MOS technology basic electrical properties of MOS and BiCMOS circuit design processes basic circuit concepts scaling and illustration of the design process.
Dissipated Power Reduction in Domino Circuit
This paper has analyzed the advantages of using dynamic circuits over static circuits with result oriented example for NAND operation, and covered the problem of increase in dynamic power dissipation at the dynamic and the output node in dynamic circuits.
International Journal of Engineering and Technical Research (IJETR)
A processor central processing unit consumes a considerable amount of processing time in performing arithmetic operations, especially multiplication operations. Multiplication is one of the basic
Design of low voltage low power CMOS analog multiplexer for bio-medical applications”, International Journal of Engineering and Advanced Technology (IJEAT)Vol
  • Issue
  • 2014
Area & power efficient design of XNOR-XOR logic using 65nm technology”, International Journal of Engineering and Technical Research
  • Special Issue pp
  • 2014
E . Waste , Kamran Eshraghian , “ Principle of CMOS VLSI design ”
  • International Journal of Engineering and Technical Research ( IJETR )
  • 2014
Area & power efficient design of XNOR - XOR logic using 65 nm technology ”
  • International Journal of Engineering and Technical Research ”