Lateral-Extended (LatEx.) active for improvement of data retention time for sub 60nm DRAM era

  title={Lateral-Extended (LatEx.) active for improvement of data retention time for sub 60nm DRAM era},
  author={Sungsam Lee and JongChul Park and K. Lee and S. Jang and Junho Lee and H. Byun and Ilgweon Kim and Yongjin Choi and M. S. Shim and D. Song and Joosung Park and T. Lee and D. Shin and G. Jin and Kinam Kim},
  journal={ESSDERC 2007 - 37th European Solid State Device Research Conference},
A new active isolation structure, LatEx (lateral-extended) active, which exploits recess channel transistors, is proposed. By realizing the LatEx active, data retention time enhancement was successfully achieved in 60 nm technology node DRAM by virtue of reduced source/drain area and improved subthreshold slope due to decreased cross-sectional area of top trench profile and vertical bottom trench process. In this paper, LatEx active coupled with SRCAT is proved to be suitable for sub 60 nm DRAM… Expand

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DRAM technology perspective for gigabit era
Many challenges emerge as the DRAM enters into a generation of the gigabit density era. Most of the challenges come from the shrink technology which scales down minimum feature size by a factor ofExpand
Comparison of cell isolated BV characteristics (A) and body effects (B) between conventional active and LatEx
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