Large-scale broadband parasitic extraction for fast layout verification of 3D RF and mixed-signal on-chip structures

@article{Ling2004LargescaleBP,
  title={Large-scale broadband parasitic extraction for fast layout verification of 3D RF and mixed-signal on-chip structures},
  author={Feng Wako-shi Ling and Vladimir Okhmatovski and William Harris and Stuart McCracken and Aykut Dengi},
  journal={2004 IEEE MTT-S International Microwave Symposium Digest (IEEE Cat. No.04CH37535)},
  year={2004},
  volume={3},
  pages={1399-1402 Vol.3}
}
In this paper, a methodology for efficient parasitic extraction and verification flow for large scale fragments of the RF and mixed-signal ASIC is presented. The usage of multi-plane precorrected-FFT (PFFT) computational engine enables the full-wave electromagnetic (EM) simulation of critical nets. The broadband capability of the EM solver is provided through the loop-tree/charge implementation of the PFFT algorithm allowing for numerically efficient and robust full-wave modeling from DC to… CONTINUE READING

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