LRU-WSR: integration of LRU and writes sequence reordering for flash memory

@article{Jung2008LRUWSRIO,
  title={LRU-WSR: integration of LRU and writes sequence reordering for flash memory},
  author={Hoyoung Jung and Hyoki Shim and Sungmin Park and Sooyong Kang and Jaehyuk Cha},
  journal={IEEE Transactions on Consumer Electronics},
  year={2008},
  volume={54}
}
Most mobile devices are equipped with a NAND flash memory even if it has characteristics of not-in-place update and asymmetric I/O latencies among read, write, and erase operations: write/erase operations are much slower than a read operation in a flash memory. For the overall performance of a flash memory system, the buffer replacement policy should consider the above severely asymmetric I/O latencies. However, existing LRU buffer replacement algorithm cannot deal with the above problem. This… CONTINUE READING
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