Joint Rewriting and Error Correction in Flash Memories


The current NAND flash architecture requires block erasure to be triggered in order to decrease the level of a single cell inside a block. Block erasures degrade the quality of cells as well as the performance of flash memories. One solution is to model flash memories as write-once memories (WOM) where the level of a cell can only be increased. Various… (More)
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@inproceedings{Jiang2013JointRA, title={Joint Rewriting and Error Correction in Flash Memories}, author={Anxiao Jiang and Yue Li and Eyal En Gad and Michael Langberg and Jehoshua Bruck}, year={2013} }