Joint Equalization and Coding for On-Chip Bus Communication

@article{Sridhara2005JointEA,
  title={Joint Equalization and Coding for On-Chip Bus Communication},
  author={Srinivasa R. Sridhara and Naresh R. Shanbhag and Ganesh Balamurugan},
  journal={IEEE Transactions on Very Large Scale Integration (VLSI) Systems},
  year={2005},
  volume={16},
  pages={314-318}
}
In this paper, we propose using joint equalization and coding to improve on-chip communication speeds by signaling at rates beyond the rate governed by resistance-capacitance (RC) delay of the interconnect. Operating beyond the RC limit introduces inter-symbol interference (ISI). We mitigate the effects of ISI by employing equalization. The proposed equalizer employs a variable threshold inverter whose switching threshold is modified as a function of past output of the bus. We demonstrate even… CONTINUE READING

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