Issues and approaches to coarse-grain reconfigurable architecture development

@article{Eguro2003IssuesAA,
  title={Issues and approaches to coarse-grain reconfigurable architecture development},
  author={Ken Eguro and S. Hauck},
  journal={11th Annual IEEE Symposium on Field-Programmable Custom Computing Machines, 2003. FCCM 2003.},
  year={2003},
  pages={111-120}
}
  • Ken Eguro, S. Hauck
  • Published 2003
  • Computer Science
  • 11th Annual IEEE Symposium on Field-Programmable Custom Computing Machines, 2003. FCCM 2003.
Although domain-specialized FPGAs (field programmable gate arrays) can offer significant area, speed and power improvements over conventional reconfigurable devices, there are several unique and unexplored design problems that complicate their development. One source of these problems is that the designers often opt to replace more universal, fine-grain logic elements with a specialized set of coarse-grain functional units to improve computation speed and reduce routing complexity. One issue… Expand
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References

SHOWING 1-10 OF 17 REFERENCES
Architecture design of reconfigurable pipelined datapaths
RaPiD - Reconfigurable Pipelined Datapath
The effect of LUT and cluster size on deep-submicron FPGA performance and density
FPGA routing architecture: segmentation and buffering to optimize speed and density
MARS - a candidate cipher for AES
Status of the Advanced Encryption Standard (AES) Development Effort
AES Proposal : Rijndael
Introducing the new LOKI97 Block Cipher
...
1
2
...