Investigation of Gate Etch Damage at Metal/High-$k$ Gate Dielectric Stack Through Random Telegraph Noise in Gate Edge Direct Tunneling Current

  title={Investigation of Gate Etch Damage at Metal/High-\$k\$  Gate Dielectric Stack Through Random Telegraph Noise in Gate Edge Direct Tunneling Current},
  author={Heung-Jae Cho and Y. Son and Byoungchan Oh and Seunghyun Jang and Jongho Lee and Byung-Gook Park and Hyungcheol Shin},
  journal={IEEE Electron Device Letters},
Plasma damage on a high-k/SiO2 dielectric at a gate edge during a dry etch process is investigated. The damage was observed to generate slow oxide traps, causing a random telegraph noise (RTN) in a gate edge direct tunneling current. Through the analysis of the RTN, the distribution of the oxide traps in the high-k/SiO2 dielectric was obtained, and the plasma-damage-induced oxide traps were found to be distributed over a wide area of the high-k/SiO2 sidewall at the gate edge region. 

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