Investigating the Relative Performance of Static and Dynamic Instruction Scheduling


There are two distlnct groups of research into ILP. Those that strongly favour static instruction schedullng and those that favour dynamic instruction scheduling. Thls paper introduces powerful static and dynamic schedullng models and combines them wlthln the framework of a slngle slmulation environment. Both individual models achleve respectable speedups; dynamic schedullng slgnlflcantly out-performs statlc scheduling when ao ideallsed processar model wlth perfect branch prediction is used. However, when a reallstlc branch predictor is substituted, the roles are reversed, and static schcdullng achleves the hlgher performance. Similarly, statlc scheduling performs better in the absence of branch prediction or when processar resources are restrkted. Finally, we combine static scheduling with out-of-order instruction issue. Disappointingly, when an ideal out-of-order processor is used, scheduled code fails to match the performance of unscheduled code. Furthermore, wlth reallstlc branch predictlon, out-of-order issue fails to improve the performance of scheduled code. Keywords-Hlgh Performance Processors, Instructlon Scheduling, Dynamic Schedullng, Multlple Instruction Issue.

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@inproceedings{Tate2013InvestigatingTR, title={Investigating the Relative Performance of Static and Dynamic Instruction Scheduling}, author={Daniel Tate and Gordon B. Steven and Paul Findlal}, year={2013} }