Four stage pipeline quaternary processor Procesador cuaternario pipeline cuatro etapas
- Computer Science
This work proposes the design of a four stages pipelined quaternary processor (eCPU) with sixteen instructions and the handling of hazards utilizing hybrid (static and dynamic) techniques with the scope to demonstrate the correct functionality with respect to the design specification.
Adapting Logic to Physics: The Quantum-Like Eigenlogic Program
- Computer ScienceEntropy
Eigenlogic is essentially a logic of operators and its truth-table logical semantics is provided by the eigenvalue structure which is shown to be related to the universality of logical quantum gates, a fundamental role being played by non-commutativity and entanglement.
Development of Programmable Logic Array for Multiple-Valued Logic Functions
- Computer ScienceIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
This article proposes to use the ferroelectrics for the implementation of MVL units using their ability to pin the polarization as a sequence of multistable states using generalized Reed-Muller expression for the representation of an MVL function.
Truth in Frege
- PhilosophyOxford Handbooks Online
A general survey of Frege’s views on truth, the chapter explores the problems in response to which Frege’s distinctive view that sentences refer to truth-values develops. Particular attention is paid…
Interpolation Methods for Binary and Multivalued Logical Quantum Gate Synthesis.
- Computer Science
A method for synthesizing quantum gates is presented based on interpolation methods applied to operators in Hilbert space and has parallels to quantum gate-T optimization methods using powers of multilinear operator polynomials.
The Foundations of Computability Theory
- MathematicsSpringer Berlin Heidelberg
This chapter discusses Hilbert's attempt at recovery, the Turing Machine, and the Turing Hierarchy of Unsolvability, as well as Degrees and the Priority Method, the Arithmetical Hierarchy.
Universal Set of CMOS Gates for the Synthesis of Multiple Valued Logic Digital Circuits
- Computer ScienceIEEE Transactions on Circuits and Systems I: Regular Papers
The design and implementation of a universal set of IC gates, CMOS 0.35 μm technology, that carry out extended AND operators: eAND1, eAND2, eND3, Successor, and Maximum operators to perform synthesis of any MVL digital circuits are designed and implemented.
Generating, solving and the mathematics of Homo Sapiens. Emil Post's views on computation
In this paper I present some of the more philosophical viewpoints of Emil Leon Post, rooted in his research from the early 20s
Meet-irreducible submaximal clones determined by nontrivial equivalence relations
- MathematicsAlgebra universalis
Let θ and ρ be a nontrivial equivalence relation and a binary relation on a finite set A, respectively. It is known from Rosenberg’s classification theorem (1965) that the clone Pol θ, which consists…