• DOI:10.1088/1748-0221/15/09/P09029
• Corpus ID: 216080898

Intrinsic time resolution of 3D-trench silicon pixels for charged particle detection

@article{Anderlini2020IntrinsicTR,
  title={Intrinsic time resolution of 3D-trench silicon pixels for charged particle detection},
  author={Lucio Anderlini and Mauro Aresti and Andrea Bizzeti and Maurizio Boscardin and Alessandro Cardini and G. F. Dalla Betta and M. Ferrero and G. T. Forcolin and Michela Garau and Adriano Lai and Andrea Lampis and Angelo Loi and Chiara Lucarelli and Roberto Mendicino and R. Mulargia and M. M. Obertino and Enrico Robutti and Sabina Ronchin and Marta Ruspa and Stefania Vecchi},
  journal={Journal of Instrumentation},
  year={2020},
  volume={15},
  pages={P09029 - P09029}
}

• L. Anderlini, M. Aresti, +17 authors S. Vecchi
• Published 22 April 2020
• Physics
• Journal of Instrumentation

In the last years, high-resolution time tagging has emerged as a promising tool to tackle the problem of high-track density in the detectors of the next generation of experiments at particle colliders. Time resolutions below 50 ps and event average repetition rates of tens of MHz on sensor pixels having a pitch of 50 μm are typical minimum requirements. This poses an important scientific and technological challenge on the development of particle sensors and processing electronics. The TIMESPOT initiative (which stands for TIME and SPace real-time Operating Tracker) aims at the development of a full prototype detection system suitable for the particle trackers of the next-to-come particle physics experiments. This paper describes the results obtained on the first batch of TIMESPOT silicon sensors, based on a novel 3D MEMS (micro electro-mechanical systems) design. We demonstrate that following this approach, the performance of other ongoing silicon sensor developments can be matched and overcome. In addition, 3D technology has already been proved to be robust against radiation damage. A time resolution of the order of 20 ps has been measured at room temperature suggesting also possible improvements after further optimisations of the front-end electronics processing stage.