Internal Organization of the Alpha 21164, a 300-MHz 64-bit Quad-issue CMOS RISC Microprocessor

@article{Edmondson1995InternalOO,
  title={Internal Organization of the Alpha 21164, a 300-MHz 64-bit Quad-issue CMOS RISC Microprocessor},
  author={John H. Edmondson and Paul I. Rubinfeld and Peter J. Bannon and Bradley J. Benschneider and Debra Bernstein and Ruben W. Castelino and Elizabeth M. Cooper and Daniel E. Dever and Dale R. Donchin and Timothy C. Fischer and Anil K. Jain and Shekhar Mehta and Jeanne E. Meyer and Ronald P. Preston and Vidya Rajagopalan and Chandrasekhara Somanathan and Scott A. Taylor and Gilbert M. Wolrich},
  journal={Digital Technical Journal},
  year={1995},
  volume={7}
}
A new CMOS microprocessor, the Alpha 21164, reaches 1,200 mips/600 MFLOPS (peak performance). This new implementation of the Alpha architecture achieves SPECint92/SPECfp92 performance of 345/505 (estimated). At these performance levels, the Alpha 21164 has delivered the highest performance of any commercially available microprocessor in the world as of January 1995. It contains a quad-issue, superscalar instruction unit; two 64-bit integer execution pipelines; two 64-bit floating-point… CONTINUE READING
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