Interface states in HfO/sub 2/ stacks with metal gate: nature, passivation, generation [MOS devices]

@article{Garros2005InterfaceSI,
  title={Interface states in HfO/sub 2/ stacks with metal gate: nature, passivation, generation [MOS devices]},
  author={Xavier Garros and Gilles Reimbold and D. Duret and Ch Leroux and B. Guillaumot and O. Louveau and C. Hobbs and François Martin},
  journal={2005 IEEE International Reliability Physics Symposium, 2005. Proceedings. 43rd Annual.},
  year={2005},
  pages={55-60}
}
This paper investigates interface states in HfO/sub 2/ devices with metal gate. First we studied the nature of these defects. The Si/SiO/sub x/ interface of SiO/sub x//HfO/sub 2/ stacks is modified by RTP at high temperature but after a 900/spl deg/C RTP, it is similar to the Si interface of conventional SiO/sub 2/ capacitors. Moreover, we show that higher temperatures of forming gas anneals FGA (530/spl deg/C) are required to passivate interface defects of HfO/sub 2/ capacitor devices compared… CONTINUE READING

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