Integrated packaging of a 1 kW switching module using a novel planar integration technology

@article{Liang2004IntegratedPO,
  title={Integrated packaging of a 1 kW switching module using a novel planar integration technology},
  author={Zhenxian Liang and J. D. van Wyk and F. C. Lee and Dushan Boroyevich and E. Scott and Zhou Chen and Yingfeng Pang},
  journal={IEEE Transactions on Power Electronics},
  year={2004},
  volume={19},
  pages={242-250}
}
A metal-oxide-semiconductor field-effect transistor (MOSFET) (rating at 500 V/24 A) half-bridge power switching subassembly with gate drivers has been fabricated, employing a planar integration technology, in which an integrated power chips stage is built by embedding chips in a coplanar ceramic substrate with a metallization thin-film interconnection built up onto it. This deposited metallization not only bonds the power chips, but also provides the second-level interconnect wiring. The… CONTINUE READING
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