# Integer factorization with a neuromorphic sieve

@article{Monaco2017IntegerFW, title={Integer factorization with a neuromorphic sieve}, author={John V. Monaco and Manuel M. Vindiola}, journal={2017 IEEE International Symposium on Circuits and Systems (ISCAS)}, year={2017}, pages={1-4} }

The bound to factor large integers is dominated by the computational effort to discover numbers that are smooth, typically performed by sieving a polynomial sequence. On a von Neumann architecture, sieving has log-log amortized time complexity to check each value for smoothness. This work presents a neuromorphic sieve that achieves a constant time check for smoothness by exploiting two characteristic properties of neuromorphic architectures: constant time synaptic integration and massively…

## 15 Citations

### Factoring Integers With a Brain-Inspired Computer

- Computer ScienceIEEE Transactions on Circuits and Systems I: Regular Papers
- 2018

A neuromorphic sieve is presented that achieves a constant-time check for smoothness by reversing the roles of space and time from the von Neumann architecture and exploiting two characteristic properties of brain-inspired computation: massive parallelism and constant time synaptic integration.

### Solving Vertex Cover via Ising Model on a Neuromorphic Processor

- Computer Science2018 IEEE International Symposium on Circuits and Systems (ISCAS)
- 2018

This work demonstrates how a neuromorphic processor can be used to solve the classic vertex cover problem via an Ising spin model and states that space and time efficiency is decreased only by a constant factor without degrading solution quality.

### Dynamic Programming with Spiking Neural Computing

- Computer ScienceICONS
- 2019

It is demonstrated that a broad class of combinatorial and graph problems known as dynamic programs enjoy simple and efficient neuromorphic implementations, by developing a general technique to convert dynamic programs to spiking neuromorphic algorithms.

### Shortest Path and Neighborhood Subgraph Extraction on a Spiking Memristive Neuromorphic Implementation

- Computer ScienceNICE '19
- 2019

This work demonstrates two graph problems that can be solved using SNCs and discusses the approach for mapping these applications to an SNC, and estimates the performance of a memristive SNC for these applications on three real-world graphs.

### The TENNLab Exploratory Neuromorphic Computing Framework

- Computer ScienceIEEE Letters of the Computer Society
- 2018

This letter presents the software architecture of the TENNLab framework, a software infrastructure that will enable potential users of spiking, neuromorphic computing systems to develop applications and evaluate computing architectures, and for architecture researchers to develop and evaluate their architectures with a variety of applications.

### Spiking Neuromorphic Networks for Binary Tasks

- Computer ScienceICONS
- 2021

The goal with this work is to enable the composition of multiple spiking neural networks, perhaps trained with other methodologies, without requiring information to leave a neuroprocessor for processing by conventional hardware.

### Building a Comprehensive Neuromorphic Platform for Remote Computation

- Computer Science
- 2019

This paper discusses methods, motivated by recent results, to produce a cohesive neuromorphic system that effectively integrates novel and traditional algorithms for context-driven remote computation.

### The Case for RISP: A Reduced Instruction Spiking Processor

- Computer ScienceArXiv
- 2022

RISP, a reduced instruction spiking processor, is introduced and it is demonstrated how it aids in developing hand built neural networks for simple computational tasks, and how it may be employed to simplify neural networks built with more complicated machine learning techniques.

### Efficient CMOS Invertible Logic Using Stochastic Computing

- Computer ScienceIEEE Transactions on Circuits and Systems I: Regular Papers
- 2019

This paper presents a design methodology for invertible stochastic gates, which can be implemented using a small amount of CMOS hardware and proves that the design can not only correctly implement the basic gates with invertable capability but can also be extended to construct invertibles stochastics adder and multiplier circuits.

### Reducing the Size of Spiking Convolutional Neural Networks by Trading Time for Space

- Computer Science2020 International Conference on Rebooting Computing (ICRC)
- 2020

This work designs multiple spiking computational modules, which reduce the size of the networks back to size ofThe conventional networks by taking advantage of the temporal nature of spiking neural networks.

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