Institute of Electrical Engineering and Information Technology , University of Paderborn

@inproceedings{HungerInstituteOE,
  title={Institute of Electrical Engineering and Information Technology , University of Paderborn},
  author={Marc Hunger and Sybille Hellebrand and Alejandro Czutro and Ilia Polian and Bernd Becker}
}
—Robust circuit design has become a major concern for nanoscale technologies. As a consequence, for design validation , not only the functionality of a circuit has to be considered, but also its robustness properties have to be analyzed. In this work we propose a method to verify the strong fault-secureness by use of constrained SAT-based ATPG. Strongly fault-secure circuits can be seen as the widest class of circuits achieving the totally self-checking (TSC) goal, which requires that every… CONTINUE READING

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