Corpus ID: 2339602

Instance-Specific Versus Parameter-Specific Circuit Generation

@inproceedings{Kent2005InstanceSpecificVP,
  title={Instance-Specific Versus Parameter-Specific Circuit Generation},
  author={Kenneth B. Kent and Zhao Yong and Jacqueline E. Rice and Troy Ronda},
  booktitle={ERSA},
  year={2005}
}
There exist many computationally intensive problems for which the use of configurable hardware can provide a satisfactory solution. This paper examines two approaches to the design of configurable solutions: an instance-specific and a parameter-specific approach. We investigate both of these approaches as applied to the computation of the autocorrelation coefficients for a Boolean 
2 Citations

Figures, Tables, and Topics from this paper

Case studies in determining the optimal field programmable gate array design for computing highly parallelisable problems
  • J. Rice, K. Kent
  • Engineering, Computer Science
  • IET Comput. Digit. Tech.
  • 2009
TLDR
The optimal design on field programmable gate arrays (FPGAs) for problems with algorithms or sub-algorithms that can be highly parallelised is investigated and a classification system is introduced, which categorises FPGA-based solutions into 'instance-specific' and 'parameter-specific'. Expand
Parameter-Specific FPGA Implementation of Edit-Distance Calculation
TLDR
This paper presents a technique in which a custom circuit solution for a given parameter set is generated for the edit-distance problem in comparing two sequences for similarity. Expand

References

SHOWING 1-9 OF 9 REFERENCES
Autocorrelation testing of combinational circuits
This paper considers autocorrelation testing for the detection of single stuck-at faults on non-syndrome testable input lines of an internally unate combinational network. The question of anExpand
Using FPGAs to solve the Hamiltonian cycle problem
  • M. Serra, K. Kent
  • Computer Science
  • Proceedings of the 2003 International Symposium on Circuits and Systems, 2003. ISCAS '03.
  • 2003
TLDR
The experimental results show that the reconfigurable hardware approach yields significant runtime speedups over the conventional approach, although the clock rate of the FPGA hardware is much slower than that of the workstation running the software solver. Expand
Graph-Based Algorithms for Boolean Function Manipulation
  • R. Bryant
  • Computer Science
  • IEEE Transactions on Computers
  • 1986
TLDR
Experimental results from applying a new data structure for representing Boolean functions and an associated set of manipulation algorithms to problems in logic design verification demonstrate the practicality of this approach. Expand
RMESH algorithms for parallel string matching
  • Hsi-Chieh Lee, F. Erçal
  • Computer Science
  • Proceedings of the 1997 International Symposium on Parallel Architectures, Algorithms and Networks (I-SPAN'97)
  • 1997
TLDR
Three algorithms for string matching on reconfigurable mesh architectures are presented and the first algorithm finds the exact matching between T and P in O(1) time on a 2-dimensional RMESH of size (n-m+1)/spl times/m. Expand
Methods for Calculating Autocorrelation Coefficients
  • Proceedings of the 4th International Workshop on Boolean Problems, (IWSB P2000)
  • 2000
Using Instance-Specific Circuits to Compute Autocorrelation Coefficients
  • Proceedings of the First Annual Northeast Workshop on Circuits and Systems (NEWCAS)
  • 2003
The Use of Autocorrelation Coefficients for Variable Ordering for ROBDDs
  • Proceedings of the 4th International Workshop on Applications of the Reed-Müller Expansion in Circuit Design (RM99)
  • 1999
Autocorrelation Testing of Combinational Circuits. Computers and Digital Techniques
  • IEE Proceedings E
  • 1989