Corpus ID: 17057019

Incremental Data Converters

  title={Incremental Data Converters},
  author={G. Temes and Y. Wang and Wenhuan Yu and J. M{\'a}rkus and Robert Bosch Kft},
Incremental data converters (IDCs) are high-accuracy oversampled analog-to-digital converters (ADCs). They form a special subclass of the commonly used delta-sigma ADCs. Unlike the latter, IDCs are only operated intermittently, typically for a few hundred clock periods, and hence they possess only a finite memory. They offer advantages in high accuracy, stability, absence of idle tones, low power dissipation, and ease of multiplexing. Hence, they are often used in sensor and MEMS interfaces. In… Expand
Analog to Digital CMOS Converter for Wireles BLE Sensors
This work details the design and implementation of an Incremental Delta-Sigma ADC for the purpose of converting the output signal of a temperature sensor with a precision of 0.25C. The conversionExpand
A 1.3-μW 12-bit incremental ΔΣ ADC for energy harvesting sensor applications
An ultra-low power, incremental ΔΣ ADC for sensor applications that achieves 68 dB peak SNDR with OSR=200 and is comparable to the state-of-the-art incremental ADCs, while power consumption is at least 5X lower. Expand


Noise–Power Optimization of Incremental Data Converters
An exact design methodology for IDCs is proposed, which optimizes the signal-to-noise ratio of the converter under practical design constraints, and allows the designer to apportion the noise budget in an arbitrary manner between thermal and quantization noise. Expand
A low-power 22-bit incremental ADC
This paper describes a low-power 22-bit incremental ADC, including an on-chip digital filter and a low-noise/low-drift oscillator, realized in a 0.6-mum CMOS process. It incorporates a novelExpand
Noise-coupled continuous-time delta-sigma ADCs
The noise-coupling technique successfully used in discrete-time delta-sigma analogue-to-digital converters (ADCs) is extended to the realisation of continuous-time delta-sigma ADCs, resulting inExpand
A Noise-Coupled Time-Interleaved ΔΣ ADC with 4.2MHz BW, -98dB THD, and 79dB SNDR
In this paper, two prototype versions of a SC time-interleaved DeltaSigma ADC are described. Both use quantization- noise coupling for enhanced noise shaping. They achieve high linearity, and FOMs ofExpand
A digital calibration technique for DAC mismatches in delta-sigma modulators
  • Wenhuan Yu, G. Temes
  • Computer Science
  • 2009 IEEE International Symposium on Circuits and Systems
  • 2009
A digital calibration technique is proposed for DAC mismatches in delta-sigma (ΔΣ) modulators that works as an incremental ADC in the calibration mode and can be used in double-sampling delta- sigma modulators. Expand
Noise-Coupled Delta-Sigma ADCS
This chapter describes wideband discrete-time DS ADCs with high linearity. Noise coupling is introduced in a modulator (self coupling) or between two split modulators (cross coupling) to get anExpand
Epileptic source localization with high density EEG: how many electrodes are needed?
The results illustrate the necessity of multichannel EEG recordings for high source location accuracy in epileptic patients and confirm the relation between the number of electrodes and localization accuracy. Expand
Proceedings of the 19th International Symposium on Mathematical Theory of Networks and Systems – MTNS 2010 @BULLET 5–9 July
  • Proceedings of the 19th International Symposium on Mathematical Theory of Networks and Systems – MTNS 2010 @BULLET 5–9 July
  • 2010