Increasing Robustness of SAT-based Delay Test Generation Using Efficient Dynamic Learning Techniques

@article{Eggersgl2009IncreasingRO,
  title={Increasing Robustness of SAT-based Delay Test Generation Using Efficient Dynamic Learning Techniques},
  author={Stephan Eggersgl{\"u}{\ss} and Rolf Drechsler},
  journal={2009 14th IEEE European Test Symposium},
  year={2009},
  pages={81-86}
}
Due to the increased speed in modern designs, testing for delay faults has become an important issue in the post-production test of manufactured chips. A high fault coverage is needed to guarantee the correct temporal behavior. Today's ATPG algorithms have difficulties to reach the desired fault coverage due to the high complexity of modern designs. In this paper, we describe how to efficiently integrate the reuse of learned information into state-of-the-art SAT-based ATPG algorithms and, by… CONTINUE READING

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