Improving SRAM Vmin and yield by using variation-aware BTI stress


We propose a novel method that exploits BTI to partially offset variation and thus improve SRAM Vmin and yield. We show correlation between a bitcell's power-up state and its static noise margin. By applying stress with periodic re-power-up, device mismatch can be compensated by BTI induced changes. The proposed method has no extra design and area cost. It… (More)
DOI: 10.1109/CICC.2010.5617631


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