Improving SMT performance: an application of genetic algorithms to configure resizable caches

@inproceedings{Daz2009ImprovingSP,
  title={Improving SMT performance: an application of genetic algorithms to configure resizable caches},
  author={Josefa D{\'i}az and Jos{\'e} Ignacio Hidalgo and Francisco Fern{\'a}ndez and Oscar Garnica and Sonia L{\'o}pez},
  booktitle={GECCO},
  year={2009}
}
Simultaneous Multithreading (SMT) is a technology aimed at improving the throughput of the processor core by applying Instruction Level Parallelism (ILP) and Thread Level Parallelism (TLP). Nevertheless a good control strategy is required when resources are shared among different threads, so that throughput is optimized. We study the application of evolutionary algorithms to improve the allocation of configurations on the cache hierarchy over a Simultaneous Multithreading (SMT) processor. In… CONTINUE READING
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