Improving Memory Latency Aware Fetch Policies for SMT Processors


In SMT processors several threads run simultaneously to increase available ILP, sharing but competing for resources. The instruction fetch policy plays a key role, determining how shared resources are allocated. When a thread experiences an L2 miss, critical resources can be monopolized for a long time choking the execution of the remaining threads. A… (More)
DOI: 10.1007/978-3-540-39707-6_6


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