Improving Memory Access Performance Using a Code Coalescing Unit

@inproceedings{1998ImprovingMA,
  title={Improving Memory Access Performance Using a Code Coalescing Unit},
  author={},
  year={1998}
}
  • Published 1998
High clock frequencies combined with deep pipelining employed by many of the state-of-the-art processors have forced cache hit accesses to be multi-cycle operations. For many programs, untolerated load latencies account for a signiicant portion of total execution time. In this paper, we present a mechanism called the Code Coalescing Unit (CCU) that can identify and eliminate at run-time several load operations. The multi-cycle load operations are converted to register read operations with zero… CONTINUE READING

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