Improving Cache Performance in Dynamic Applications through Data and Computation Reorganization at Run Time


With the rapid improvement of processor speed, performance of the memory hierarchy has become the principal bottleneck for most applications. A number of compiler transformations have been developed to improve data reuse in cache and registers, thus reducing the total number of direct memory accesses in a program. Until now, however, most data reuse… (More)
DOI: 10.1145/301618.301670


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