Improving 64-bit Java IPF performance by compressing heap references

@article{AdlTabatabai2004Improving6J,
  title={Improving 64-bit Java IPF performance by compressing heap references},
  author={Ali-Reza Adl-Tabatabai and Jay Bharadwaj and Michal Cierniak and Marsha Eng and Jesse Zhixi Fang and Brian T. Lewis and Brian R. Murphy and James M. Stichnoth},
  journal={International Symposium on Code Generation and Optimization, 2004. CGO 2004.},
  year={2004},
  pages={100-110}
}
64-bit processor architectures like the Intel/spl reg/ Itanium/spl reg/ processor family are designed for large applications that need large memory addresses. When running applications that fit within a 32-bit address space, 64-bit CPUs are at a disadvantage compared to 32-bit CPUs because of the larger memory footprints for their data. This results in worse cache and TLB utilization, and consequently lower performance because of increased miss ratios. This paper considers software techniques… Expand
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