# Improved upper bounds on the stabilizer rank of magic states

@article{Qassim2021ImprovedUB, title={Improved upper bounds on the stabilizer rank of magic states}, author={Hammam Qassim and Hakop Pashayan and David Gosset}, journal={Quantum}, year={2021}, volume={5}, pages={606} }

<jats:p>In this work we improve the runtime of recent classical algorithms for strong simulation of quantum circuits composed of Clifford and T gates. The improvement is obtained by establishing a new upper bound on the stabilizer rank of <mml:math xmlns:mml="http://www.w3.org/1998/Math/MathML"><mml:mi>m</mml:mi></mml:math> copies of the magic state <mml:math xmlns:mml="http://www.w3.org/1998/Math/MathML"><mml:mrow class="MJX-TeXAtom-ORD"><mml:mo stretchy="false">|</mml:mo></mml:mrow><mml:mi>T…

## 15 Citations

### Lower Bounds on Stabilizer Rank

- MathematicsElectron. Colloquium Comput. Complex.
- 2021

The stabilizer rank of a quantum state ψ is the minimal r such that |ψ〉 = ∑j=1 cj ∣ ∣ so that ψ ≥ 1 and r ≥ 1.

### The Parameterized Complexity of Quantum Verification

- Mathematics, Computer ScienceTQC
- 2022

It is shown that for the problem of parameterized quantum circuit satisfiability, there exists a classical algorithm solving the problem with a runtime scaling exponentially in the number of non-Clifford gates but only polynomially with the system size.

### Simulating quantum circuits with ZX-calculus reduced stabiliser decompositions

- Computer ScienceQuantum Science and Technology
- 2022

We introduce an enhanced technique for strong classical simulation of quantum circuits which combines the ‘sum-of-stabilisers’ method with an automated simplification strategy based on the…

### Classical Simulation of Quantum Circuits with Partial and Graphical Stabiliser Decompositions

- Computer ScienceTQC
- 2022

This work finds a new technique of partial stabiliser decompositions that allow us to trade magic states for stabiliser terms, and manages to reliably simulate 50-qubit 1400 T-count hidden shift circuits in a couple of minutes on a consumer laptop.

### Quantum circuit compilation and hybrid computation using Pauli-based computation

- Physics, Computer Science
- 2022

Practical ways of implementing PBC as adaptive quantum circuits, and code to do the required classical side-processing are proposed, and the practical advantage of PBC techniques for circuit compilation and hybrid computation is demonstrated.

### Thrifty shadow estimation: re-using quantum circuits and bounding tails

- Mathematics, Computer Science
- 2022

This paper proposes and analyzes a more practically-implementable variant of the protocol, thrifty shadow estimation, in which quantum circuits are reused many times instead of having to be freshly generated for each measurement.

### Measuring magic on a quantum processor

- Computer Science, Physicsnpj Quantum Information
- 2022

This work proposes and experimentally demonstrate a protocol for measuring magic based on randomized measurements that can provide a characterization of the effectiveness of a quantum hardware in producing states that cannot be effectively simulated on a classical computer.

### Magic determines the hardness of direct fidelity estimation

- Computer Science
- 2022

This work shows how the resource theory of magic quantiﬁes the hardness of direct ﬁdelity estimation protocols, and extends the results to quantum evolutions, showing that the resources needed to certify the quality of the implementation of a given unitary U are governed by the magic in the Choi state associated with U.

### How to Simulate Quantum Measurement without Computing Marginals.

- Computer SciencePhysical review letters
- 2022

Algorithms for classically simulating measurement of an n-qubit quantum state in the standard basis, that is, sampling a bit string from the probability distribution determined by the Born rule are described and analyzed.

### Faster Born probability estimation via gate merging and frame optimisation

- Computer ScienceQuantum
- 2022

Two classical sub-routines are proposed: circuit gate merging and frame optimisation, which optimise the circuit representation to reduce the sampling overhead and show that the runtimes of both sub- routines scale polynomially in circuit size and gate depth.

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