Corpus ID: 7562868

Improved Performance of Advance Encryption Standard using Parallel Computing

@inproceedings{Pachori2012ImprovedPO,
  title={Improved Performance of Advance Encryption Standard using Parallel Computing},
  author={Vishal Pachori and Gunjan Ansari and N. Chaudhary},
  year={2012}
}
This paper presents the implementation of Advance encryption (AES) algorithm using parallel computing. Most of the research for improving performance of AES is based on hardware implementation. This paper presents the parallel implementation of AES using JPPF (Java Parallel Programming Framework) which provides flexibility & performance improvement in terms of speed-up. In this implementation there are two approaches data parallelism and control parallelism. In Data parallelism, xn plain text… Expand
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References

SHOWING 1-5 OF 5 REFERENCES
Dynamic reconfigurable implementations of AES algorithm based on pipeline and parallel structure
TLDR
The results of simulation and verification experiments prove that this model highlights all the advantages of dynamic reconfiguration technology, considers the application of parallel connections, increases the throughput, and excels in processing speed. Expand
Multi-core implementation of the symmetric cryptography algorithms in the measurement system
Abstract The paper presents the implementation of symmetric cryptography algorithms in the measurement system, where the virtual instruments equipped with the multi-core processors are used toExpand
A new compact dual-core architecture for AES encryption and decryption
  • Hua Li, Jianzhou Li
  • Computer Science
  • Canadian Journal of Electrical and Computer Engineering
  • 2008
TLDR
A new compact architecture, consisting of two independent cores that process encryption and decryption simultaneously, for the Advanced Encryption Standard (AES) algorithm is presented, and a novel way to implement ShiftRows/InvShiftRows, one of the key designs in the compact 32-bit architecture, is proposed. Expand
De Anza College Cryptography and Network Security
  • De Anza College Cryptography and Network Security
  • 2007
Online forum of JPPF Team available at: http:// www.jppf.org/forum
  • Online forum of JPPF Team available at: http:// www.jppf.org/forum