Improved Carry Select Adder with Reduced Area and Low Power Consumption

@inproceedings{Devi2010ImprovedCS,
  title={Improved Carry Select Adder with Reduced Area and Low Power Consumption},
  author={Padma Devi and Ashima Girdher and Balwinder Singh},
  year={2010}
}
ABSTRACT Power dissipation is one of the most important design objectives in integrated circuits, after speed. As adders are the most widely used components in such circuits, design of efficient adder is of much concern for researchers. This paper presents performance analysis of different Fast Adders. The comparison is done on the basis of three performance parameters i.e. Area, Speed and Power consumption. We present a modified carry select adder designed in different stages. Results obtained… CONTINUE READING

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