An OpenSHMEM Implementation for the Adapteva Epiphany Coprocessor
- Computer ScienceOpenSHMEM
The implementation and performance evaluation of the OpenSHMEM 1.3 specification for the Adapteva Epiphany architecture within the Parallella single-board computer shows that the physical topology and memory-mapped capabilities of the core and network translate well to Partitioned Global Address Space (PGAS) programming models and SPMD execution with SHMEM.
A Distributed Shared Memory Model and C++ Templated Meta-Programming Interface for the Epiphany RISC Array Processor
- Computer ScienceICCS
ePython: An Implementation of Python for the Many-Core Epiphany Co-processor
- Computer Science2016 6th Workshop on Python for High-Performance and Scientific Computing (PyHPC)
The result of this work is support for developing Python on the Epiphany, which can be applied to other similar architectures, that the community have already started to adopt and use to explore concepts of parallelism and HPC.
On the Performance and Isolation of Asymmetric Microkernel Design for Lightweight Manycores
- Computer Science2019 IX Brazilian Symposium on Computing Systems Engineering (SBESC)
The results show that an asymmetric microkernel design is scalable and introduces at most 0.9% of performance interference in an application execution, and co-design aspects between an OS kernel and the architecture of lightweight manycore, concerning the memory system and core grouping are unveiled.
Enhancing Programmability in NoC-Based Lightweight Manycore Processors with a Portable MPI Library
- Computer Science
A portable and lightweight MPI library designed from scratch to cope with restrictions and intricacies of lightweight manycores is proposed and integrated into a distributed OS that targets these processors and evaluated it on the Kalray MPPA-256 processor.
Domain-Decomposition Parallelization for Molecular Dynamics Algorithm with Short-Ranged Potentials on Epiphany Architecture
- Computer ScienceLobachevskii Journal of Mathematics
This paper uses LAMMPS running on one 64-bit ARMv8 Cortex-A53 CPU core for comparing the accuracy of the results of the presented variant of the molecular dynamics algorithm for Epiphany and its computational efficiency.
Energy Efﬁciency of Epiphany Many-Core Architecture for Parallel Molecular Dynamics Calculations
- Computer Science
Comparison of the energy consumption and performance of Parallella board with Epiphany coprocessor with a modern general-purpose processor Cortex-A53 shows the advantage of the Paral- lella platform, while there are still opportunities to improve the software.
RMem: An OS Service for Transparent Remote Memory Access in Lightweight Manycores
- Computer Science
This work focuses on the open challenges that arise from constrained memory subsystems of lightweight manycores, such as the presence of multiple address spaces and limited on-chip memory, and introduces an OS service, named RMem, which provides a shared memory abstraction over multiple address Spaces and exposes system calls that enable one-sided communication on top of this abstraction.
A combined fast/cycle accurate simulation tool for reconfigurable accelerator evaluation: application to distributed data management
- Computer Science2020 International Workshop on Rapid System Prototyping (RSP)
A simulation tool aiming to study the integration of reconfigurable accelerators in scalable distributed systems and runtimes, such as S-DSM systems, where S- DSM (software-distributed shared memory) is a paradigm to ease data management among distributed nodes is presented.
Experiments Using a Software-Distributed Shared Memory, MPI and 0MQ over Heterogeneous Computing Resources
- Computer ScienceEuro-Par Workshops
A video processing application is written using MPI, 0MQ and an in-house software-distributed shared memory (S-DSM) backend and deployed over a set of heterogeneous computing boards and results show that 0MQ implementation is the most efficient but at the price of writing the application with the targeted platform in mind.
SHOWING 1-4 OF 4 REFERENCES
Threaded MPI programming model for the Epiphany RISC array processor
- Computer ScienceJ. Comput. Sci.
Parallel Programming Model for the Epiphany Many-Core Coprocessor Using Threaded MPI
- Computer ScienceMicroprocess. Microsystems
This paper demonstrates an efficient parallel programming model for the Epiphany architecture based on the Message Passing Interface (MPI) standard that enables MPI codes to execute on the RISC array processor with little modification and achieve high performance.
Kickstarting high-performance energy-efficient manycore architectures with Epiphany
- Computer Science2014 48th Asilomar Conference on Signals, Systems and Computers
Epiphany is introduced as a highperformance energy-efficient manycore architecture suitable for real-time embedded systems and achieves 50 GFLOPS/W in 28 nm technology, making it suitable for high performance streaming applications like radio base stations and radar signal processing.