Implementation of diode and bipolar triggered SCRs for CDM robust ESD protection in 90nm CMOS ASICs

@article{Brennan2005ImplementationOD,
  title={Implementation of diode and bipolar triggered SCRs for CDM robust ESD protection in 90nm CMOS ASICs},
  author={Ciaran J. Brennan and Shunhua Chang and Min Woo and Kiran V. Chatty and Robert Gauthier},
  journal={2005 Electrical Overstress/Electrostatic Discharge Symposium},
  year={2005},
  pages={1-7}
}
We report the characterization of diode and bipolar triggered SCRs with VFTLP measurements and product ESD testing. A dual base Darlington bipolar triggered SCR (DbtSCR) in a triple well structure is demonstrated to provide 4 KV HBM, 300 V MM and 1000 V CDM protection for 90 nm ASIC I/Os. A very fast turn-on time of 460 ps was measured for the DbtSCR, compared to 8 ns for a diode triggered SCR. 
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