This paper deals with the implementation of a new reconfigurable architecture for the computation of Fast Fourier Transform (FFT) in the context of digital terrestrial television broadcasting (DTTB). The proposed architecture allows more possibilities in the choice of the FFT size. In this paper, two algorithms (Radix algorithm and Winograd Fourier Transform Algorithm (WFTA)) are presented. These may be used to compute a FFT of size 2048 (2K), 4096 (4K), 8192 (8K) or 3780 that are utilized in three of the most important DTTB standards. The reconfigurable architecture is presented. The time performances and resources requirement are provided in comparison with classical architectures.