Corpus ID: 12831739

Implementation of Multi-Bit flip-flop forPower Reduction in CMOS Technologies

  title={Implementation of Multi-Bit flip-flop forPower Reduction in CMOS Technologies},
  author={K. Anka Siva Prasad and Gundlapalle Rajesh and V. Thrimurthulu},
  journal={International Journal of Innovative Research in Computer and Communication Engineering},
Nowadays Power has become a major concern in low power VLSI design. Achieving low power consumption is a tedious one in IC fabrication industries. In modern integrated circuits, clocking is the most dominating power consuming element. Hence this paper describes a method for reducing the power consumption by replacing some flip-flops with fewer multi-bit flip-flops. We perform a co-ordinate transformation to identify those flip-flops that can be merged and their legal regions. Besides, we show… Expand


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  • D. Duarte, N. Vijaykrishnan, M. J. Irwin
  • Engineering, Computer Science
  • Proceedings IEEE Computer Society Annual Symposium on VLSI. New Paradigms for VLSI Systems Design. ISVLSI 2002
  • 2002
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