Implementation of High Speed FIR Filter using Serial and Parallel Distributed Arithmetic Algorithm

@article{Narendra2011ImplementationOH,
  title={Implementation of High Speed FIR Filter using Serial and Parallel Distributed Arithmetic Algorithm},
  author={S. Narendra and Pal Singh Harjit and Rakesh Kumar Sarin and Singh Sarabjeet},
  journal={International Journal of Computer Applications},
  year={2011},
  volume={25},
  pages={26-32}
}
This paper describes the implementation of highly efficient multiplierless serial and parallel distributed arithmetic algorithm for FIR filters. Distributed Arithmetic (DA) had been used to implement a bit-serial scheme of a general symmetric version of an FIR filter due to its high stability and linearity by taking optimal advantage of the look-up table (LUT) based structure of FPGAs. The performance of the bitserial and bit-parallel DA technique for FIR filter design is analyzed and the… Expand
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