Implementation of Hardware Encryption Engine for Wireless Communication on a  Reconfigurable Instruction Cell Architecture

Abstract

Security issues emerged in recent years as the fast development of wireless technology, especially for mobile devices where computing resources are sparse. This paper presents the implementation of RC4 as well as AES (Advanced Encryption Standard) cipher algorithm, which are widely used in IEEE 802.11 as well as IEEE 802.16 and other standards. The implementations target a novel reconfigurable instruction cell array (RICA) based architecture which has recently been developed, with the aim of achieving low power, high performance and programming flexibility. As our simulation result shows RC4 stream cipher throughput achieves as high as 60 Mbps with 128 bits key size and 1024 bits data buffer packet. The AES algorithm has also been implemented on RICA, achieving a throughput of 55.6 Mbps with typical 128 bits key and 128 bits block size after optimization. Compared to commercial hardware encryption architecture of the same wireless application domain, our architecture exhibits superiority in several aspects.

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Cite this paper

@article{Wang2008ImplementationOH, title={Implementation of Hardware Encryption Engine for Wireless Communication on a  Reconfigurable Instruction Cell Architecture}, author={Zong Wang and Tughrul Arslan and A Taner Erdoğan}, journal={4th IEEE International Symposium on Electronic Design, Test and Applications (delta 2008)}, year={2008}, pages={148-152} }