Implementation and Performance of an Improved Turbo Decoder on a Configurable Computing Machine

@inproceedings{Puckett2000ImplementationAP,
  title={Implementation and Performance of an Improved Turbo Decoder on a Configurable Computing Machine},
  author={W. Bruce Puckett},
  year={2000}
}
  • W. Bruce Puckett
  • Published 2000
(ABSTRACT) Turbo codes are a recently discovered class of error correction codes that achieve near-Shannon limit performance. Because of their complexity and highly parallel nature, turbo coded applications are well suited for configurable computing. Field-programmable gate arrays (FPGAs), which are the main building blocks of configurable computing machines (CCMs), allow users to design flexible hardware that is optimized for performance, speed, power consumption, and chip-area. This thesis… CONTINUE READING
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Referenced Papers

Publications referenced by this paper.
Showing 1-10 of 25 references

Implementation of a Turbo Decoder on a Configurable Computing Platform

  • J. R. Hess
  • M.S. thesis,
  • 1999
Highly Influential
13 Excerpts

SLAAC Presentation

  • Brian Schott
  • Feb. 2000.
  • 2000
Highly Influential
4 Excerpts

A simple stopping criteria for turbo decoding

  • Y. Wu, B. D. Woerner, W. J. Ebel
  • IEEE Communications Letters, Nov. 1999. Accepted.
  • 1999
Highly Influential
3 Excerpts

Overview of wireless personal communications

  • J. E. Padgett, C. G. Gunther, T. Hattori
  • IEEE Communications Magazine, vol. 33, pp. 28–41…
  • 1995
Highly Influential
10 Excerpts

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