Impact of gate-leakage currents on CMOS circuit performance

@article{Marras2004ImpactOG,
  title={Impact of gate-leakage currents on CMOS circuit performance},
  author={Alessandro Marras and Ilaria De Munari and Davide Vescovi and Paolo Ciampolini},
  journal={2004 24th International Conference on Microelectronics (IEEE Cat. No.04TH8716)},
  year={2004},
  volume={2},
  pages={653-656 vol.2}
}
Ultra-thin gate dielectrics are exploited in fabrication of MOSFET's featuring channel lengths in the decananometer range: the ITRS indicates that oxide thickness in the order of 1 nm will be used in 2005 for ultra-short CMOS. For such aggressively scaled devices, gate-leakage currents represent a critical issue. In this paper, a study on the impact of Direct-Tunneling (DT) current on the behaviour of a wide variety of CMOS circuits is presented, based on a simulation strategy aimed at… CONTINUE READING

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