Impact of failure criteria on the reliability prediction of CMOS devices with ultrathin gate oxides based on voltage ramp stress

@article{Kerber2006ImpactOF,
  title={Impact of failure criteria on the reliability prediction of CMOS devices with ultrathin gate oxides based on voltage ramp stress},
  author={Andreas Kerber and T. Pompl and M. Rohner and K. Mosig and M. Kerber},
  journal={IEEE Electron Device Letters},
  year={2006},
  volume={27},
  pages={609-611}
}
The gate oxide reliability prediction based on the soft breakdown (SBD) failure criteria limits the operation voltage of future CMOS technologies. Progressive wear-out observed in ultrathin gate oxides leads to a delayed hard dielectric breakdown and can therefore effectively increase the reliability margin. For quantification of this effect, voltage ramp tests were applied to a large sample size and the results linked to constant voltage stress. Based on area scaling, it will be shown that a… CONTINUE READING
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