Impact of Subwavelength CD Tolerance on Device Performance

  title={Impact of Subwavelength CD Tolerance on Device Performance},
  author={Artur Balasinski and L. Karklin and Valery Axelrad},
We describe a new procedure of design qualification to ensure manufacturability of deep sub-wavelength circuits. The procedure is based on optical simulation of the layout, integrated with device simulation that should meet predefined conditions set forth by the layout control lines called tolerance contours. These contours, a new concept proposed in this work, are first defined for active devices based on the geometry-dependent, target MOSFET parameters, such as ION and IOFF and for… CONTINUE READING
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Optimizing the Cost of Design Rule Modifications for Subsequent Generations of Semiconductor Technology

  • A. Balasinski
  • Proc . ASMC
  • 2000

An Integrated Simulation Scheme to Optimize Dense Memory Layouts , ” 199 th Meeting of The Electrochem Comparison of Mask Writing Tools and Mask Simulations for 0 . 16 um Devices

  • A. Balasinski, L. Karklin
  • Proc . ASMC
  • 1999

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