Impact of Modern Process Technologies on the Electrical Parameters of Interconnects

@article{Sinha2007ImpactOM,
  title={Impact of Modern Process Technologies on the Electrical Parameters of Interconnects},
  author={Debjit Sinha and Jianfeng Luo and Subramanian Rajagopalan and Shabbir H. Batterywala and Narendra V. Shenoy and Hai Zhou},
  journal={20th International Conference on VLSI Design held jointly with 6th International Conference on Embedded Systems (VLSID'07)},
  year={2007},
  pages={875-880}
}
  • Debjit Sinha, Jianfeng Luo, +3 authors Hai Zhou
  • Published in
    20th International Conference…
    2007
  • Computer Science
  • This paper presents the results obtained from an experimental study of the impact of modern process technologies on the electrical parameters of interconnects. Variations in parasitic capacitances and resistances due to dummy metal fills, chemical mechanical polishing, multiple thin inter-layer dielectrics and trapezoidal conductor cross-sections are presented. Accurate variations in the parasitics are reported for a set of timing critical nets using 3d field solvers for extraction. Results… CONTINUE READING

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