Corpus ID: 36060579

ISA Aging : A X 86 case study

  title={ISA Aging : A X 86 case study},
  author={Bruno Lopes and R. Auler and R. Azevedo and E. Borin},
  • Bruno Lopes, R. Auler, +1 author E. Borin
  • Published 2013
  • Microprocessor designers such as Intel and AMD implement old instruction sets at their modern processors to ensure backward compatibility with legacy code. In addition to old backward compatibility instructions, new extensions are constantly introduced to add functionalities. In this way, the size of the IA-32 ISA is growing at a fast pace, reaching almost 1300 different instructions in 2013 with the introduction of AVX2 and FMA3 by Haswell. Increasing the size of the ISA impacts both hardware… CONTINUE READING

    Figures and Tables from this paper


    Compilation framework for code size reduction using reduced bit-width ISAs (rISAs)
    • 17
    • PDF
    Modern Processor Design: Fundamentals of Superscalar Processors
    • 260
    • Highly Influential
    • PDF
    Clustering-Based Microcode Compression
    • 7
    • PDF
    Using SSE and SSE2 : Misconceptions and reality
    • 34
    ARMv7-M Architecture Reference Manual
    • July
    • 2012
    Instructions for objconv
    • 2011
    Bochs: A Portable PC Emulator for Unix/X
    • 161