IMITATOR: A deterministic multicore replay system with refining techniques

Abstract

Developing parallel programs imposes many debugging challenges on multicore systems. Many researchers were successful to detect parallel faults in background by hardware assistance. However, it is still an urgent issue to reproduce the same faulted circumstance after faults occurred. Tracing the causality between events is a popular solution in current… (More)
DOI: 10.1109/VLSI-DAT.2012.6212625

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Cite this paper

@article{Chen2012IMITATORAD, title={IMITATOR: A deterministic multicore replay system with refining techniques}, author={Shing-Yu Chen and Chi-Neng Wen and Geng-Hau Yang and Wen-Ben Jone and Tien-Fu Chen}, journal={Proceedings of Technical Program of 2012 VLSI Design, Automation and Test}, year={2012}, pages={1-4} }