III-V tri-gate quantum well MOSFET: Quantum ballistic simulation study for 10 nm technology and beyond

@article{Datta2016IIIVTQ,
  title={III-V tri-gate quantum well MOSFET: Quantum ballistic simulation study for 10 nm technology and beyond},
  author={Kanak Datta and Q. Khosru},
  journal={Solid-state Electronics},
  year={2016},
  volume={118},
  pages={66-77}
}
Abstract In this work, quantum ballistic simulation study of a III–V tri-gate MOSFET has been presented. At the same time, effects of device parameter variation on ballistic, subthreshold and short channel performance is observed and presented. The ballistic simulation result has also been used to observe the electrostatic performance and Capacitance–Voltage characteristics of the device. With constant urge to keep in pace with Moore’s law as well as aggressive scaling and device operation… Expand
2 Citations
Performance Analysis of Ultra-thin-Body, DoubleGate pMOSFETs at 5 nm Technology Node
  • Afshan Khaliq, W. Yin
  • 2020 IEEE MTT-S International Conference on Numerical Electromagnetic and Multiphysics Modeling and Optimization (NEMO)
  • 2020
In this work, quantum ballistic transport study of a Si double-gate pMOSFET has been carried out in an ultra-thin structure. The simulation is performed by using non-equilibrium Green’s functionExpand

References

SHOWING 1-10 OF 36 REFERENCES
Impact of high-κ gate dielectric and other physical parameters on the electrostatics and threshold voltage of long channel gate-all-around nanowire transistor
High-i¾? gate-all-around structure counters the Short Channel Effect SCEs mostly providing excellent off-state performance, whereas high mobility III-V channel ensures better on-state performance,Expand
Ballistic metal-oxide-semiconductor field effect transistor
Experiments on ultra‐small metal‐oxide‐semiconductor field effect transistors (MOSFETs) less than 100 nm have been widely reported recently. The frequency of carrier scattering events in theseExpand
Electrostatics improvement in 3-D tri-gate over ultra-thin body planar InGaAs quantum well field effect transistors with high-K gate dielectric and scaled gate-to-drain/gate-to-source separation
In this work, 3-D Tri-gate and ultra-thin body planar InGaAs quantum well field effect transistors (QWFETs) with high-K gate dielectric and scaled gate-to-source/gate-to-drain (LSIDE) have beenExpand
On the Interpretation of Ballistic Injection Velocity in Deeply Scaled MOSFETs
The ballistic injection velocity is examined in state-of-the-art Si extremely thin SOI MOSFETs using ballistic quantum simulations and a virtual source (VS) compact model. The results indicate thatExpand
Exploring new channel materials for nanoscale CMOS devices: A simulation approach
Rahman, Anisur. Ph.D., Purdue University, December, 2005. Exploring New Channel Materials for Nanoscale CMOS Devices: A Simulation Approach. Major Professor: Mark Lundstrom and Gerhard Klimeck. TheExpand
Nanoscale MOSFETS: Physics, Simulation and Design
This thesis discusses device physics, modeling and design issues of nanoscale transistors at the quantum level. The principle topics addressed in this report are 1) an implementation of appropriateExpand
Non-planar, multi-gate InGaAs quantum well field effect transistors with high-K gate dielectric and ultra-scaled gate-to-drain/gate-to-source separation for low power logic applications
In this work, non-planar, multi-gate InGaAs quantum well field effect transistors (QWFETs) with high-K gate dielectric and ultra-scaled gate-to-drain and gate-to-source separations (LSIDE) of 5nm areExpand
High performance sub-20-nm-channel-length extremely-thin body InAs-on-insulator tri-gate MOSFETs with high short channel effect immunity and Vth tunability
We have investigated the effects of vertical scaling and the tri-gate structure on electrical properties of extremely-thin-body (ETB) InAs-on-insulator (-OI) MOSFETs. It was found that body thicknessExpand
On the distinction between triple gate (TG) and double gate (DG) SOI FinFETs: A proposal of critical top oxide thickness
Distinction between triple gate (TG) and double gate (DG) silicon-on-insulator (SOI) FinFETs is presented here on the basis of their electrostatic and transport characteristics. A study missing inExpand
Electron Scattering in Buried InGaAs MOSFET Channel with HfO 2 Gate Oxide
Group III-V semiconductor materials are being studied as potential replacements for conventional CMOS technology due to their better electron transport properties. However, the excess scattering ofExpand
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