A Controller for Dynamic Partial Reconfiguration in FPGA-Based Real-Time Systems
Application circuits configured on Xilinx Virtex series FPGAs are able to reconfigure the FPGA at run time using the on-chip ICAP. Traditional methods of accessing the ICAP using OPB-based and PLB-based schemes are unnecessarily complex and rarely reused. In this study, a new interface for accessing the ICAP is introduced. The interface is easy to use, it can readily be integrated to different systems, it is customizable, and it is reusable. A demonstration is crafted to show the use of the new interface. Performance results for the new interface and two existing OPB-based and PLB-based methods are compared.