Hybrid RAM–CAM based Pipelined register renaming and recovery for High-performance processors

  • Manasa N, Dhana Selvi
  • Published 2014

Abstract

Modern multi superscalar processors implement register renaming using either random access memory (RAM) or contentaddressable memories (CAM) tables. The design of these structures should address both access time and miss prediction recovery penalty. Although direct-mapped RAMs provide faster access times, CAMs are more appropriate to avoid recovery… (More)

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