Highly efficient 5G linear power amplifiers (PA) design challenges

@article{Lie2017HighlyE5,
  title={Highly efficient 5G linear power amplifiers (PA) design challenges},
  author={Donald Yu-Chun Lie and Jill C. Mayeda and J. Lopez},
  journal={2017 International Symposium on VLSI Design, Automation and Test (VLSI-DAT)},
  year={2017},
  pages={1-3}
}
  • D. Lie, J. Mayeda, J. Lopez
  • Published 24 April 2017
  • Computer Science
  • 2017 International Symposium on VLSI Design, Automation and Test (VLSI-DAT)
The incoming 5G revolution will dramatically increase the design complexity for handsets and communication infrastructures, demanding the RFIC and ASIC chipsets designers, network and system components vendors and telecom operators to provide viable 5G E2E (End-to-End) products and solutions before A.D. 2020. The broadband modulation bandwidth for RF transmitters (i.e., 250 MHz to above 1 GHz), stringent linearity, and power efficiency requirements at the cm-Wave/mm-Wave 5G frequencies will… 

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