High-voltage tolerant stimulation monitoring circuit in conventional CMOS process

  • Edward K. F. Lee
  • Published 2009 in 2009 IEEE Custom Integrated Circuits Conference


Design techniques for realizing analog switch and rail-to-rail constant g<inf>m</inf> opamp with approximately twice the standard supply voltages and signal swings are proposed in this paper. Based on these techniques, a 6V stimulation monitoring circuit for monitoring 8 different stimulator outputs was implemented in a conventional 0.18&#x00B5;m CMOS process using standard 3.3V I/O devices. Maximum on-resistance for the switches was less than 3.15k&#x2126; and the variations on the opamp input g<inf>m</inf> values were less than &#x00B1;2.9% with a current consumption of 20&#x00B5;A at 6V.

DOI: 10.1109/CICC.2009.5280893

10 Figures and Tables

Cite this paper

@article{Lee2009HighvoltageTS, title={High-voltage tolerant stimulation monitoring circuit in conventional CMOS process}, author={Edward K. F. Lee}, journal={2009 IEEE Custom Integrated Circuits Conference}, year={2009}, pages={93-96} }