High performance integrated Prolog processor IPP

@inproceedings{Abe1987HighPI,
  title={High performance integrated Prolog processor IPP},
  author={S. Abe and T. Bandoh and S. Yamaguchi and Ken-ichi Kurosawa and K. Kiriyama},
  booktitle={ISCA '87},
  year={1987}
}
To realize the highest performance possible for a sequential processor, and to realize utilization of a large amount of existing software, an integrated Prolog processor (IPP) and its optimized compiler are now being developed. A tagged architecture under constraints of a general purpose computer and a memory management strategy to achieve a high performance are discussed and then an IPP architecture is presented. Based on the Prolog instruction set, which is an extension of Warren's, the… Expand
Architecture of high performance integrated Prolog processor IPP
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An optimal memory system to realize a high performance integrated Prolog processor, the IPP is discussed, and it is concluded that the advanced store-through cache is best suited to theIPP. Expand
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  • 1989
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