High performance and energy efficient FinFET based 1-bit PT full adders

This paper deals with the implementation of low voltage, energy efficient and high speed 1-bit Full Adder (FA) cell in pass transistor (PT) logic by using 20 nm compact model parameters. The existing full adder with pass transistor logic suffers from a drawback of replication of full swing in sum and carry outputs and voltage step existed in both the… CONTINUE READING