High performance FPGA implementation of Data encryption standard

@article{Abdelwahab2015HighPF,
  title={High performance FPGA implementation of Data encryption standard},
  author={Murtada Mohamed Abdelwahab},
  journal={2015 International Conference on Computing, Control, Networking, Electronics and Embedded Systems Engineering (ICCNEEE)},
  year={2015},
  pages={37-40}
}
The proposed cryptographic system represents a compact data encryption algorithm (DEA). The implementation provides a short path of encryption and consists of single round. It used only 303 slice and achieved throughput of 278.282 Mbps. The results are shown in the form of chip area performance and performance/slice. The results are compared graphically with similar encryption implementations and founded very competitive.