# High-performance FPGA implementation of DES using a novel method for implementing the key schedule

@inproceedings{McLoone2003HighperformanceFI, title={High-performance FPGA implementation of DES using a novel method for implementing the key schedule}, author={M{\'a}ire McLoone and John V. McCanny}, year={2003} }

A generic, parameterisable key scheduling core is presented, which can be utilised in pipelinable private-key encryption algorithms. The data encryption standard (DES) algorithm, which lends itself readily to pipelining, is utilised to exemplify this novel key scheduling method and the broader applicability of the method to other encryption algorithms is illustrated. The DES design is implemented on Xilinx Virtex FPGA technology. Utilising the novel method, a 16-stage pipelined DES design is…

## 64 Citations

FPGA IMPLEMENTATION OF DES USING PIPELINING CONCEPT WITH SKEW CORE KEY-SCHEDULING

- Computer Science
- 2009

This paper presents a high-performance reconfigurable hardware implementation of the Data Encryption Standard (DES) algorithm. This is achieved by combining pipelining concept with novel skew core…

Qaqos: Efficient Hardware Implementation of the Pipelined DES Encryption Algorithm

- Computer Science
- 2015

The comparison results indicate that a high throughput with optimized resource utilizations can be achieved using a superpipelined concept on the proposed design in a single FPGA chip.

FPGA Implementation of the Pipelined Data Encryption Standard (DES) Based on Variable Time Data Permutation

- Computer Science
- 2010

This paper describes a high-performance reconfigurable hardware implementation of the new Data Encryption Standard based on variable time data permutation, which is more secure and among the fastest hardware implementations with better area utilization.

A Compact and Efficient FPGA Implementation of the DES Algorithm

- Computer Science
- 2004

This paper presents an efficient and compact reconfigurable hardware implementation of the Data Encryption Standard (DES) algorithm that achieved a data encryption/decryption rate of 274 Mbits/s occupying only 117 CLB slices.

FPGA based pipelined architecture for RC5 encryption

- Computer Science2012 Second International Conference on Digital Information and Communication Technology and it's Applications (DICTAP)
- 2012

This paper describes the high performance pipelined hardware implementation of RC5 algorithm in Xilinx Vertex II Pro FPGA with a 12-stage pipeline scheme that has achieved an encryption rate of 6.9 Gbps.

Modeling and Simulation of Data Encryption Standard Algorithm on FPGA

- Computer Science
- 2012

This paper demonstrates an efficient and compact reconfigurable hardware implementation of the Data Encryption Standard (DES) algorithm implemented on FPGA of device VirtexEXCV400e and utilized a parallel structure that allowed it to compute all the eight DES S-boxes simultaneously.

An Enhanced Secured FPGA based DES

- Computer Science
- 2016

An efficient and compact reconfigurable hardware implementation of the Data Encryption Standard (DES) algorithm implemented on FPGA of device VirtexEXCV400e using a parallel structure that allowed us to compute all the eight DES S-boxes simultaneously.

Hardware implementation of DES using pipelining concept with time-variable key

- Computer Science2010 International Conference on Microelectronics
- 2010

Two high-performance reconfigurable hardware implementations of the Data Encryption Standard (DES) algorithm are described by combining pipelining concept with time-variable key technique, which enhances the security of DES.

FPGA implementation of Data Encryption Standard using time variable permutations

- Computer Science, Mathematics2015 27th International Conference on Microelectronics (ICM)
- 2015

A secure, high-throughput and area-efficient Field Programming Gate Arrays (FPGA) implementation of the Data Encryption Standard algorithm by combining 16 pipelining concept with time variable permutations and compared with previous illustrated encryption algorithms.

Performance Analysis of DES Secured FPGA

- Computer Science2021 2nd International Conference for Emerging Technology (INCET)
- 2021

The useful & adjustable functionality for the Data Encryption Standard (D.E.S.S) algorithm is demonstrated and an examination of the design used suggests that it is practicable to produce data in 16 clock cycles while using the pipeline-free method.

## References

SHOWING 1-6 OF 6 REFERENCES

A case study of partially evaluated hardware circuits: Key-specific DES

- Computer ScienceFPL
- 1997

By applying partial evaluation to DES on a Xilinx XC4000 series device, the CLB usage is reduced by 45% and the encryption bandwidth is improved by 35%.

High performance DES encryption in Virtex/sup TM/ FPGAs using JBits/sup TM/

- Computer ScienceProceedings 2000 IEEE Symposium on Field-Programmable Custom Computing Machines (Cat. No.PR00871)
- 2000

A JBits implementation of the Data Encryption Standard (DES) algorithm in a Virtex FPGA with a throughput of over 10 Gigabits per second, which exceeds the performance of a recently announced DES ASIC.

A DES ASIC Suitable for Network Encryption at 10 Gbps and Beyond

- Computer ScienceCHES
- 1999

The Sandia National Laboratories (SNL) Data Encryption Standard (DES) Application Specific Integrated Circuit (ASIC) is the fastest known implementation of the DES algorithm as defined in the Federal…

A Fast New DES Implementation in Software

- Computer ScienceFSE
- 1997

A new optimized standard implementation of DES on 64-bit processors is described, which is about twice faster than the fastest known standard DES implementation on the same processor.

Basic Methods of Cryptography

- Computer Science
- 1998

This book will be of value to advanced students and researchers involved in data protection and information processing, especially electrical engineers and people working in informatics and computer science.

Handbook of Applied Cryptography

- Computer Science, Mathematics
- 1996

From the Publisher:
A valuable reference for the novice as well as for the expert who needs a wider scope of coverage within the area of cryptography, this book provides easy and rapid access of…